One example of an input/output (I/O) bus that connects an information processing device and an I/O device is a PCI Express (peripheral component interconnect express) bus. The PCI Express has a tree structure with a host bridge located at the root and an I/O device located at an endpoint. When multiple I/O devices are connected, a PCI express switch is required at an intermediate point in the tree structure. The PCI Express switch has a two-level tree structure in which ports serve as PCI-to-PCI (P2P) bridges. Unique numbers are assigned from an OS (operating system)/BIOS (basic input/output system) to devices included in the PCI Express.
A switch that supports a large number of ports is required in order to connect a large number of I/O devices in a single system. However, when the number of ports is merely increased in a single switch LSI (large scale integration), cost for LSI design and manufacture and printed-circuit-board implementation increases. Accordingly, multiple PCI Express switches are simply connected to increase the number of ports in order to connect a large number of I/O devices. When the switches are connected, the PCI Express hierarchical structure is determined depending on which switch is closer to a host bridge. That is, during start of an information processing device, the bus hierarchical levels of the switches are seen differently from the OS/BIOS. However, since the bus hierarchical levels are finite, the depth of the bus hierarchical levels that can be supported by the OS/BIOS is also limited.